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1ELEC 5200-001/6200-001 Computer 27logic Registers to register through memory
Architecture and Design Spring 2015 (write) Register to register through
History of Computers (Chapter 1). Vishwani memory (read) Data transfer through
D. Agrawal James J. Danaher Professor communication bus Source register writes
Department of Electrical and Computer on bus Destination register reads from bus
Engineering Auburn University, Auburn, AL Control circuit provides read / write
36849 http://www.eng.auburn.edu/~vagrawal signals for bus and memory. Spr 2015, Jan
vagrawal@eng.auburn.edu. Spr 2015, Jan 16 16 . . . 27. 27. ELEC 5200-001/6200-001
. . . 1. 1. ELEC 5200-001/6200-001 Lecture Lecture 2.
2. 28Communication Bus. A device writing on
2Historic Events. 1623, 1642: Wilhelm bus outputs inputs. A device neither
Schickard (1592-1635) and Blaise Pascal writing on nor reading from bus outputs
(1623-1662) built mechanical counters with inputs. 1 0. 0 0. Bus. 0 1. Control
carry. 1823-34: Charles Babbage designed a signals. Control circuit. outputs inputs A
difference engine. device reading from bus. Control signals.
http://www.youtube.com/watch?v=0anIyVGeWOI Opcode. Spr 2015, Jan 16 . . . 28. 28.
amp;feature=related 1941: Conrad Zuse ELEC 5200-001/6200-001 Lecture 2.
(1910-1995) built Z3, the first working 29Control Circuit – Finite State
programmable computer, built in Germany. Machine. Start. MAR ? PC PC ? PC+1. Read
Spr 2015, Jan 16 . . . 2. 2. ELEC memory. Decode left instruction. Fetch
5200-001/6200-001 Lecture 2. Instruction. Execute. Decode right
3Z3. Conrad Zuse Z1 (1938) Z2 (1939) Z3 instruction. Execute. Spr 2015, Jan 16 . .
(1941) ? ? ? Spr 2015, Jan 16 . . . 3. . 29. 29. ELEC 5200-001/6200-001 Lecture
ELEC 5200-001/6200-001 Lecture 2. 2.
4Historic Events. 1942: Vincent 30Von Neumann Bottleneck. Von Neumann
Atanasoff (professor) and Clifford Barry architecture uses the same memory for
(graduate assistant) built the first instructions (program) and data. The time
electronic computer (ABC) at Iowa State spent in memory accesses can limit the
College. 1943-44: John Mauchly (professor) performance. This phenomenon is referred
and J. Presper Eckert (graduate student) to as von Neumann bottleneck. To avoid the
built ENIAC at U. Pennsylvania, 1623. bottleneck, later architectures restrict
1944: Howard Aiken used “separate data and most operands to registers (temporary
program memories” in MARK I – IV computers storage in processor). Ref.: D. E. Comer,
– Harvard Architecture. 1945-52: John von Essentials of Computer Architecture, Upper
Neumann proposed a “stored program Saddle River, NJ: Pearson Prentice-Hall,
computer” EDVAC (Electronic Discrete 2005, p. 87. Spr 2015, Jan 16 . . . 30.
Variable Automatic Computer) – Von Neumann 30. ELEC 5200-001/6200-001 Lecture 2.
Architecture – use the same memory for 31John von Neumann (1903-1957). Spr
program and data. Spr 2015, Jan 16 . . . 2015, Jan 16 . . . 31. 31. ELEC
4. 4. ELEC 5200-001/6200-001 Lecture 2. 5200-001/6200-001 Lecture 2.
5The Atanasoff Story. The First 32Second Generation Computers. 1955 to
Electronic Computer, the Atanasoff Story, 1964 Transistor replaced vacuum tubes
by Alice R. Burks and Arthur W. Burks, Ann Magnetic core memories Floating-point
Arbor, Michigan: The University of arithmetic High-level languages used:
Michigan Press, 1991. The Man Who Invented ALGOL, COBOL and FORTRAN System software:
the Computer: The Biography of John compilers, subroutine libraries, batch
Atanasoff, Digital Pioneer, by Jane processing Example: IBM 7094. Spr 2015,
Smiley, 256 pages, Doubleday, $25.95. Spr Jan 16 . . . 32. 32. ELEC
2015, Jan 16 . . . 5. 5. ELEC 5200-001/6200-001 Lecture 2.
5200-001/6200-001 Lecture 2. 33Third Generation Computers. Beyond
6National Medal of Technology 1990. 1965 Integrated circuit (IC) technology
John Vincent Atanasoff (1903–1995). Spr Semiconductor memories Memory hierarchy,
2015, Jan 16 . . . 6. ELEC virtual memories and caches Time-sharing
5200-001/6200-001 Lecture 2. Parallel processing and pipelining
7Most Influential Document. Microprogramming Examples: IBM 360 and
“Preliminary Discussion of the Logical 370, CYBER, ILLIAC IV, DEC PDP and VAX,
Design of an Electronic Computing Amdahl 470. Spr 2015, Jan 16 . . . 33. 33.
Instrument,” 1946 report by A. W. Burks, ELEC 5200-001/6200-001 Lecture 2.
H. H. Holdstine and J. von Neumann. 34C Programming Language and UNIX
Appears in Papers of John von Neumann, W. Operating System. Now. 1972. Spr 2015, Jan
Aspray and A. Burks (editors), MIT Press, 16 . . . 34. 34. ELEC 5200-001/6200-001
Cambridge, Mass., 1987, pp. 97-146. Spr Lecture 2.
2015, Jan 16 . . . 7. 7. ELEC 35Theory of Computing. Alan Turing
5200-001/6200-001 Lecture 2. (1912-1954) gave a model of computing in
8History Continues. 1946-52: Von 1936 – Turing Machine. Original paper: A.
Neumann built the IAS computer at the M. Turing, “On Computable Numbers with an
Institute of Advanced Studies, Princeton – Application to the Entscheidungsproblem*,”
A prototype for most future computers. Proc. Royal Math. Soc., ser. 2, vol. 42,
1947-50: Eckert-Mauchly Computer Corp. pp. 230-265, 1936. Recent book: David
built UNIVAC I (Universal Automatic Leavitt, The Man Who Knew Too Much: Alan
Computer), used in the 1950 census. 1949: Turing and the Invention of the Computer
Maurice Wilkes built EDSAC (Electronic (Great Discoveries), W. W. Norton &
Delay Storage Automatic Calculator), the Co., 2005. * The question of decidability,
first stored-program computer. Spr 2015, posed by mathematician Hilbert. Spr 2015,
Jan 16 . . . 8. 8. ELEC 5200-001/6200-001 Jan 16 . . . 35. 35. ELEC
Lecture 2. 5200-001/6200-001 Lecture 2.
9First General-Purpose Computer. 36Turing Machine. ti. Machine
Electronic Numerical Integrator and instruction: sh ti oj sk. Processor P.
Calculator (ENIAC) built in World War II Read-write head. Infinite memory tape
was the first general purpose computer (data). Present state of processor Symbol
Used for computing artillery firing tables on tape Operation Next state of processor.
80 feet long, 8.5 feet high and several Spr 2015, Jan 16 . . . 36. 36. ELEC
feet wide Twenty 10 digit registers, each 5200-001/6200-001 Lecture 2.
2 feet long Used 18,000 vacuum tubes 5,000 37Turing Machine. Four operations: oj =
additions/second Weight: 30 tons Power tj, replace present symbol ti by tj oj =
consumption: 140kW. © 2004 Morgan Kaufman R, move head one position to right oj = L,
Publishers. Spr 2015, Jan 16 . . . 9. 9. move head one position to left oj = H,
ELEC 5200-001/6200-001 Lecture 2. halt the computation Universal Turing
10Univac: Election, Nov. 4, 1952. Machine: small instruction set, #symbols ?
Candidate. Candidate. Electoral votes. #states < 30; can perform any possible
Electoral votes. Univac prediction. Actual (computable) computation. Computable means
count. Eisenhower. 438. 442. Stevenson. that Turing machine halts in finite number
93. 89. Harold Sweeney, operator J. of steps. Real computers have finite
Presper Eckert, co-inventor Walter memory – they find certain problems
Cronkite, CBS USA TODAY, Oct 27, 2004, p. intractable. Ref: J. P. Hayes, Computer
B.3. Spr 2015, Jan 16 . . . 10. 10. ELEC Architecture and Organization, New York:
5200-001/6200-001 Lecture 2. McGraw-Hill, 1978. Spr 2015, Jan 16 . . .
11First-Generation Computers. Late 1940s 37. 37. ELEC 5200-001/6200-001 Lecture 2.
and 1950s Stored-program computers 38Example. Start with a blank tape and
Programmed in assembly language Used create a pattern 0b1b0b1b . . . Define
magnetic devices and earlier forms of symbols: b (blank), 0, 1. Present state.
memories Examples: IAS, ENIAC, EDVAC, Symbol on tape. Operation. Next state. S0
UNIVAC, Mark I, IBM 701. Spr 2015, Jan 16 (begin). blank. Write 0 and move right.
. . . 11. 11. ELEC 5200-001/6200-001 S1. S1. blank. Move right. S2. S2. blank.
Lecture 2. Write 1 and move right. S3. S3. blank.
12The Organization of IAS Computer. Move right. S0.
DATAPATH. CONTROL UNIT. Accumulator (AC). http://en.wikipedia.org/wiki/Turing_machin
Multiplier/Quotient (MQ). Input/ Output _examples. Spr 2015, Jan 16 . . . 38. ELEC
Equipment. Arithmetic Logic Circuits. 5200-001/6200-001 Lecture 2.
Memory Buffer Register (MBR). Instr. 39Turing Test. Can a computer think?
Buffer (IBR). Program Counter (PC). Main (Turing, 1950).
Memory (M) 212 x 40 bit words. Instruction http://en.wikipedia.org/wiki/Computing_Mac
Register (IR). Memory Address Reg. (MAR). inery_and_Intelligence#cite_note-1 A. P.
Control Circuit. Control Signals. Spr Saygin, I. Cicekli and V. Akman, “Turing
2015, Jan 16 . . . 12. 12. ELEC Test: 50 Years Later,” Minds and Machines,
5200-001/6200-001 Lecture 2. vol. 10, no. 4, pp. 463-518, 2000. Watson
13IAS Computer Machine Language. 40-bit vs. humans:
word, two machine instructions per word. http://www.engadget.com/2011/01/13/ibms-wa
Left instruction. Right instruction. bit son-supercomputer-destroys-all-humans-in-j
0. 7 8. 19 20. 27 28. 39. 8-bit opcode. opardy-pract/. Spr 2015, Jan 16 . . . 39.
12-bit memory address (operand). Ref: J. ELEC 5200-001/6200-001 Lecture 2.
P. Hayes, Computer Architecture and 40Turing Test in 2014. June 8, 2014, The
Organization, New York: McGraw-Hill, 1978. 65 year-old Turing Test was passed for the
Spr 2015, Jan 16 . . . 13. 13. ELEC very first time by computer program Eugene
5200-001/6200-001 Lecture 2. Goostman during Turing Test 2014 held at
14IAS Data Transfer Instructions (7). the renowned Royal Society in London on
Instruction Opcode Description LOAD MQ Saturday. 'Eugene' simulates a 13 year old
00001010 AC ? MQ LOAD MQ, M(X) 00001001 MQ boy and was developed in Saint Petersburg,
? M(X) STOR M(X) 00100001 M(X) ? AC LOAD Russia. The development team includes
M(X) 00000001 AC ? M(X) LOAD – M(X) Vladimir Veselov and Eugene Demchenko. A
00000010 AC ? – M(X) LOAD |M(X)| 00000011 program wins the Turing Test if it is
AC ? |M(X)| LOAD – |M(X)| 00000100 AC ? – mistaken for a human more than 30% of the
|M(X)|. Ref. W. Stallings, Computer time.
Organization & Architecture, Sixth http://www.reading.ac.uk/news-and-events/r
Edition, Prentice-Hall, 2003, page 23. Spr leases/PR583836.aspx. Spr 2015, Jan 16 . .
2015, Jan 16 . . . 14. 14. ELEC . 40. ELEC 5200-001/6200-001 Lecture 2.
5200-001/6200-001 Lecture 2. 41Movie: The Imitation Game. About
15IAS Unconditional Branch Instructions English mathematician and logician, Alan
(2). Instruction Opcode Description JUMP Turing, helps crack the Enigma code during
M(X,0:19) 00001101 next instruction World War II. Screenplay: Graham Moore
M(X,0:19) JUMP M(X,20:39) 00001110 next Cast: Benedict Cumberbatch, Keira
instruction M(X,20:39). Spr 2015, Jan 16 . Knightley, Matthew Goode Trailer:
. . 15. 15. ELEC 5200-001/6200-001 Lecture http://www.imdb.com/title/tt2084970/?ref_=
2. v_sr_1 Release date: November 2014. Spr
16IAS Conditional Branch Instructions 2015, Jan 16 . . . 41. ELEC
(2). Instruction Opcode Description JUMP 5200-001/6200-001 Lecture 2.
+M(X,0:19) 00001111 IF AC ? 0, then next 42Incompleteness Theorem. In 1931, the
instruction M(X,0:19) JUMP +M(X,20:39) Czech-born mathematician Kurt G?del
00010000 IF AC ? 0, then next instruction (1906-1978) demonstrated that within any
M(X,20:39). Spr 2015, Jan 16 . . . 16. 16. given branch of mathematics, there would
ELEC 5200-001/6200-001 Lecture 2. always be some propositions that couldn't
17IAS Arithmetic Instructions (8). be proven either true or false using the
Instruction Opcode Description ADD M(X) rules and axioms. G?del's Theorem has been
00000101 AC ? AC + M(X) ADD |M(X)| used to argue that a computer can never be
00000111 AC ? AC + |M(X)| SUB M(X) as smart as a human being because the
00000110 AC ? AC ? M(X) SUB |M(X)| extent of its knowledge is limited by a
00001000 AC ? AC ? |M(X)| MUL M(X) fixed set of axioms, whereas people can
00001011 AC, MQ ? MQ?M(X) DIV M(X) discover unexpected truths. See
00001100 MQ, AC ? MQ/M(X) LSH 00010100 AC http://www.miskatonic.org/godel.html and
? AC x 2 RSH 00010101 AC ? AC / 2. Spr other websites. Spr 2015, Jan 16 . . . 42.
2015, Jan 16 . . . 17. 17. ELEC 42. ELEC 5200-001/6200-001 Lecture 2.
5200-001/6200-001 Lecture 2. 43The Barber Paradox By Linda Shaver (An
18IAS Address Modify Instructions (2). Example of Undecidability). In a
Instruction Opcode Description STOR particular town, there’s a particular
M(X,8:19) 00010010 M(X,8:19) ? AC(28:39) barbershop with a peculiar sign in the
STOR M(X,28:39) 00010011 M(X,28:39) ? window that reads: “This barber shaves all
AC(28:39). Spr 2015, Jan 16 . . . 18. 18. and only those men of the town who do not
ELEC 5200-001/6200-001 Lecture 2. shave themselves.” Question: According to
19How IAS Computer Adds Two Numbers. the sign in the window, does the barber
Suppose the numbers are stored in memory shave himself? Spr 2015, Jan 16 . . . 43.
locations 100 and 101, and The sum is to 43. ELEC 5200-001/6200-001 Lecture 2.
be saved in memory location 102 44The Now Generation. Personal computers
Instruction Opcode Description LOAD M(100) Laptops and Palmtops Networking and
00000001 AC ? M(100) ADD M(101) 00000101 wireless SOC and MEMS technology And the
AC ? AC + M(101) STOR M(102) 00100001 future! Biological computing Molecular
M(102) ? AC. Spr 2015, Jan 16 . . . 19. computing Nanotechnology Optical computing
19. ELEC 5200-001/6200-001 Lecture 2. Quantum computing See articles listed on
20IAS Computer Machine Code. 00100001 the next slide and available at E7700:
000001100110 00000000 000000000000. Advanced VLSI Design course site,
00000001 000001100100 00000101 http://www.eng.auburn.edu/~vagrawal/COURSE
000001100101. Load 100 Add 101. Stor 102 E7770_Spr12/course.html. Spr 2015, Jan 16
Stop. Spr 2015, Jan 16 . . . 20. 20. ELEC . . . 44. 44. ELEC 5200-001/6200-001
5200-001/6200-001 Lecture 2. Lecture 2.
21Save Program in Memory. Memory. 45Useful Reading. R. I. Bahar, D.
Address 0. First program word. Second Hammerstrom, J. Harlow, W. H. Joyner Jr.,
program word. Address. Load program C. Lau, D. Marculescu, A. Orailoglu and M.
Counter, PC. Word 100 Word 101 Word 102. Pedram, “Architectures for Silicon
Address max. Spr 2015, Jan 16 . . . 21. Nanoelectronics and Beyond,” Computer,
21. ELEC 5200-001/6200-001 Lecture 2. vol. 40, no. 1, pp. 25-33, January 2007.
22Executing the Program. DATAPATH. T. Munakata, “Beyond Silicon: New
CONTROL UNIT. Accumulator (AC). Computing Paradigms, “Comm. ACM, vol. 50,
Multiplier/Quotient (MQ). Input/ Output no. 9, pp. 30-34, Sept. 2007. W. Robinett,
Equipment. Arithmetic Logic Circuits. G. S. Snider, P. J. Kuekes and S.
Memory Buffer Register (MBR). Instr. Williams, “Computing with a Trillion
Buffer (IBR). Program Counter (PC). Main Crummy Components,” Comm. ACM, vol. 50,
Memory (M) 212 x 40 bit words. Instruction no. 9, pp. 35-39, Sept. 2007. J. Kong,
Register (IR). Memory Address Reg. (MAR). “Computation with Carbon Nanotube
Control Circuit. Control Signals. Spr Devices,” Comm. ACM, vol. 50, no. 9, pp.
2015, Jan 16 . . . 22. 22. ELEC 40-42, Sept. 2007. R. Stadler, “Molecular,
5200-001/6200-001 Lecture 2. Chemical and Organic Computing,” Comm.
23IAS Instruction Cycles. Store machine ACM, vol. 50, no. 9, pp. 43-45, Sept.
code in contiguous words of memory. Place 2007. M. T. Bohr, R. S. Chau, T. Ghani and
starting address in program counter (PC). K. Mistry, "The High-k
Start program: MAR ? PC Read memory: IBR ? Solution," IEEE Spectrum, vol. 44,
MBR ? M(MAR), fetch Place left instruction no. 10, pp. 29-35, October 2007. J. H.
(Load) in IR and operand (address) 100 in Reif and T. H. Labean, “Autonomous
MAR, decode Read memory: AC ? M(100), Programmable Biomolecular Devices using
execute Place right instruction (Add) in Self-Assembled DNA Nanostructures,” Comm.
IR and operand (address) 101 in MAR, ACM, vol. 50, no. 9, pp. 46-53, Sept.
decode Read memory and add: AC ? AC + 2007. D. Bacon and D. Leung, “Toward a
M(101), execute PC ? PC + 1. Spr 2015, Jan World with Quantum Computers,” Comm. ACM,
16 . . . 23. 23. ELEC 5200-001/6200-001 vol. 50, no. 9, pp. 55-59, Sept. 2007. H.
Lecture 2. Abdeldayem and D. A. Frazier, “Optical
24IAS Instruction Cycles (Cont.). MAR ? Computing: Need and Challenge,” Comm. ACM,
PC Read memory: IBR ? MBR ? M(MAR), fetch vol. 50, no. 9, pp. 60-62, Sept. 2007. D.
Place left instruction (Stor) in IR and W. M. Marr and T. Munakata,
operand (address) 102 in MAR, decode MBR ? “Micro/Nanofluidic Computing,” Comm. ACM,
AC, execute Write memory Place right vol. 50, no. 9, pp. 64-68, Sept. 2007. M.
instruction (Stop) in IR and operand 000 Aono, M. Hara and K. Aihara, “Amoeba-Based
in MAR, decode Stop, execute. Spr 2015, Neurocomputing with Chaotic Dynamics,”
Jan 16 . . . 24. 24. ELEC Comm. ACM, vol. 50, no. 9, pp. 69-72,
5200-001/6200-001 Lecture 2. Sept. 2007. C. C. Lo and J. J. L. Morton,
25Hardware Contains. Data storage “Silicon’s Second Act, Can this
devices Memory Registers Instruction semiconductor workhorse take computing
decoding and execution devices Execution tnto the quantum era?” IEEE Spectrum, vol.
unit (arithmetic logic unit, ALU) Data 51, no. 8, pp. 36-43, Aug. 2014. Spr 2015,
transfer buses Control unit. Spr 2015, Jan Jan 16 . . . 45. 45. ELEC
16 . . . 25. 25. ELEC 5200-001/6200-001 5200-001/6200-001 Lecture 2.
Lecture 2. 46A Question. Which is the most popular
26Registers in IAS. Register. programming language today? A:
Size(bits). Function. Program counter http://spectrum.ieee.org/static/interactiv
(PC). 12. Holds mem. address of next -the-top-programming-languages. Spr 2015,
instruction. Accumulator (AC). 40. Jan 16 . . . 46. ELEC 5200-001/6200-001
Temporary data storage. Multiplier Lecture 2.
quotient (MQ). 40. Temporary data storage. 47Top 10 Prog. Languages. W: Web M:
Memory buffer (MBR). 40. Memory read / Mobile D: Desktop/Enterprise E: Embedded
write data. Instruction buffer (IBR). 20. Scores are normalized so that the
Holds right instr. (bits 20-39). top-ranked language’s score is set to 100.
Instruction register (IR). 8. Holds opcode Source: IEEE Spectrum July 2014. Spr 2015,
part of instruction. Memory address (MAR). Jan 16 . . . 47. ELEC 5200-001/6200-001
12. Holds mem. address part of Lecture 2.
instruction. Spr 2015, Jan 16 . . . 26. 48Next: The MIPS ISA. MIPS
26. ELEC 5200-001/6200-001 Lecture 2. (Microprocessor without Interlocked
27Register Transfer. Transfer data Pipeline Stages) is a reduced instruction
synchronously with clock Register to set architecture. Spr 2015, Jan 16 . . .
register Register to register through ALU 48. ELEC 5200-001/6200-001 Lecture 2.
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