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Design Space Exploration of Embedded Systems
Design Space Exploration of Embedded Systems
Overview
Overview
Target Platform
Target Platform
Target Platform
Target Platform
Design Space
Design Space
Design Space Exploration
Design Space Exploration
Design Space Exploration
Design Space Exploration
Design Space Exploration
Design Space Exploration
Why is Performance Analysis Difficult
Why is Performance Analysis Difficult
Simulation
Simulation
Trace-Based Simulation
Trace-Based Simulation
Static Analytic Models
Static Analytic Models
Dynamic Analytic Models
Dynamic Analytic Models
Dynamic Analytic Models
Dynamic Analytic Models
Summary
Summary
Bounds, Guarantees and Predictability
Bounds, Guarantees and Predictability
Overview
Overview
Examples Event Stream Processing
Examples Event Stream Processing
Application Model
Application Model
Architecture Templates
Architecture Templates
Mapping Model
Mapping Model
Allocation and Binding
Allocation and Binding
Abstraction
Abstraction
Real-Time Calculus
Real-Time Calculus
Elements of Modular Performance Analysis
Elements of Modular Performance Analysis
Application
Application
Hardware Architecture
Hardware Architecture
Mapping
Mapping
Modular Performance Analysis
Modular Performance Analysis
Overview
Overview
Why Performance Analysis
Why Performance Analysis
Optimization with conflicting goals
Optimization with conflicting goals
Multi-objective Optimization
Multi-objective Optimization
Multiobjective Optimization
Multiobjective Optimization
Multiobjective Optimization
Multiobjective Optimization
Optimization Alternatives
Optimization Alternatives
Traditional Approaches
Traditional Approaches
Evolutionary Algorithms
Evolutionary Algorithms
A Generic Multiobjective EA
A Generic Multiobjective EA
An Evolutionary Algorithm in Action
An Evolutionary Algorithm in Action
Overview
Overview
EXPO – Tool architecture
EXPO – Tool architecture
The Concept of PISA
The Concept of PISA
PISA: Implementation
PISA: Implementation
PISA Website
PISA Website
EXPO - Tool
EXPO - Tool
Results
Results
Validation Strategy
Validation Strategy

Презентация на тему: «Design Space Exploration of Embedded Systems». Автор: . Файл: «Design Space Exploration of Embedded Systems.ppt». Размер zip-архива: 2543 КБ.

Design Space Exploration of Embedded Systems

содержание презентации «Design Space Exploration of Embedded Systems.ppt»
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1 Design Space Exploration of Embedded Systems

Design Space Exploration of Embedded Systems

© Lothar Thiele ETH Zurich

2 Overview

Overview

Review of General Aspects Basic Models and Methods Multi-Criteria Optimization Applications

3 Target Platform

Target Platform

Heterogeneous computing and memory resources some resource types: GP processors, ASIPs (DSP, micro-controller), weakly programmable co-processors, re-configurable components, hard coded IP components heterogeneous platform software: RTOS, scheduling (pre-emptive, static, dynamic), synchronization

RISC

image coprocessor

SDRAM

DSP

CAN interface

mC

FPGA

4 Target Platform

Target Platform

Communication micro-network on chip for synchronization and data exchange consisting of busses, routers, drivers some critical issues: topology, switching strategies (packet, circuit), routing strategies (static – reconfigurable – dynamic), arbitration policies (dynamic, TDM, CDMA, fixed priority) challenges: heterogeneous components and requirements, compose network that matches the traffic characteristics of a given application (domain)

5 Design Space

Design Space

LookUp

RISC

EDF

mE

mE

mE

TDMA

static

Priority

mE

mE

mE

WFQ

Cipher

DSP

6 Design Space Exploration

Design Space Exploration

7 Design Space Exploration

Design Space Exploration

8 Design Space Exploration

Design Space Exploration

(Semi-) Automated Design Space Exploration

9 Why is Performance Analysis Difficult

Why is Performance Analysis Difficult

task1

task2

task3

task4

complex behavior - input stream - data dependent behavior

interference - limited resources - scheduling/arbitration

interference of multiple applications - limited resources - scheduling/arbitration - anomalies

CPU1

I/O

CPU2

DSP

10 Simulation

Simulation

Target architecture co-simulation combines functional and performance validation extensive runtimes worst case inputs ? test case definition ? re-targeting expensive

mixed model function: application structure: hardware-software architecture

input trace

output trace

11 Trace-Based Simulation

Trace-Based Simulation

Steps: execution trace determined by co-simulation abstract representation using communication graph extension of graph by actual architecture Faster than simulation, but still based on single trace

input trace

functional model

complete trace

abstract graph

communication architecture

trace simulation

estimation results

[Lahiri et. al, 2001]

12 Static Analytic Models

Static Analytic Models

Steps: describe computing, communication and memory resources by algebraic equations, e.g. describe properties of input using parameters, e.g. input data rate combine relations Fast and simple estimation Generally inaccurate modeling of shared resources

13 Dynamic Analytic Models

Dynamic Analytic Models

Combination between static models, possibly extended by their dynamic behavior, e.g. non-determinism in run-time and event processing dynamic models for describing shared resources (scheduling and arbitration) Variants queuing theory (statistical models, average case) real-time calculus (interval methods, worst case) More accurate than static models

14 Dynamic Analytic Models

Dynamic Analytic Models

component simulation

data sheets

model of components

input traces

model of environment

system model

model of architecture

spec. of inputs

estimation results

15 Summary

Summary

Timing Accuracy

Simulation

Trace-based simulation

Dynamic analytic methods

Static analytic methods

Run-time

16 Bounds, Guarantees and Predictability

Bounds, Guarantees and Predictability

Example: end-to-end delay

design

17 Overview

Overview

Review of General Aspects Basic Models and Methods Multi-Criteria Optimization Applications

18 Examples Event Stream Processing

Examples Event Stream Processing

19 Application Model

Application Model

Example of a simple stream processing task structure:

20 Architecture Templates

Architecture Templates

In general, we assume an arbitrary heterogeneous architecture consisting of computing resources, memory and communication resources.

event

event

events

21 Mapping Model

Mapping Model

22 Allocation and Binding

Allocation and Binding

Allocation can be represented as a function: Binding is a relation: Binding restrictions:

task1

class

task2

filter

task3

schedule

task4

risc

23 Abstraction

Abstraction

Idea: unified view of task scheduling, arbitration and event scheduling in networks: methods: queueing theory (statistical bounds, markov chains) real-time calculus (worst case bounds, min-max algebra)

24 Real-Time Calculus

Real-Time Calculus

Example of a dynamic analytic model Characteristics yields worst case estimation results for memory, delay, throughput takes into account application structure (task graph representation) architecture and mapping (computation, communication, scheduling) environment (characterization of input traces)

25 Elements of Modular Performance Analysis

Elements of Modular Performance Analysis

application

hardware architecture

mapping, scheduling

system architecture model

performance model

architectural element model

environment model

analysis

26 Application

Application

Application

p=1 s, j=0.2 s

Hndl

Dec

Disp

27 Hardware Architecture

Hardware Architecture

Application

HW Architecture

p=1 s, j=0.2 s

22 MIPS

10 MIPS

72 kbps

Hndl

Dec

Disp

28 Mapping

Mapping

Application

Mapping

HW Architecture

p=1 s, j=0.2 s

22 MIPS

10 MIPS

72 kbps

Hndl

Dec

Disp

29 Modular Performance Analysis

Modular Performance Analysis

application

hardware architecture

mapping, scheduling

system architecture model

performance model

architectural element model

environment model

analysis

30 Overview

Overview

Review of General Aspects Basic Models and Methods Multi-Criteria Optimization Applications

31 Why Performance Analysis

Why Performance Analysis

(Semi-) Automated Design Space Exploration

32 Optimization with conflicting goals

Optimization with conflicting goals

Multiobjective optimization: Find a set of optimal trade-offs Example: computer design

33 Multi-objective Optimization

Multi-objective Optimization

34 Multiobjective Optimization

Multiobjective Optimization

Maximize (y1, y2, …, yk) = ?(x1, x2, …, xn) Pareto set = set of all Pareto-optimal solutions

35 Multiobjective Optimization

Multiobjective Optimization

Minimize

(x1, x2, …, xn) (y1, y2, …, yk) Difficulties: ? large search space ? multiple optima

f

x2

y2

objective space

decision space

dominated

Pareto optimal = not dominated

y1

x1

36 Optimization Alternatives

Optimization Alternatives

Use of classical single objective optimization methods simulated annealing, tabu search integer linear program other constructive or iterative heuristic methods Decision making (weighting the different objectives) is done before the optimization. Population based optimization methods evolutionary algorithms genetic algorithms Decision making is done after the optimization.

37 Traditional Approaches

Traditional Approaches

Example: weighting approach

parameters

multiple objectives

single objective

transformation

y

(y1, y2, …, yk)

38 Evolutionary Algorithms

Evolutionary Algorithms

Principles of Evolution

? Cross-over

? Selection

? Mutation

39 A Generic Multiobjective EA

A Generic Multiobjective EA

population

archive

evaluate sample vary

update truncate

new archive

new population

40 An Evolutionary Algorithm in Action

An Evolutionary Algorithm in Action

hypothetical trade-off front

41 Overview

Overview

Review of General Aspects Basic Models and Methods Multi-Criteria Optimization Applications

42 EXPO – Tool architecture

EXPO – Tool architecture

MOSES

EXPO

SPEA 2

Tool available online: http://www.tik.ee.ethz.ch/expo/expo.html

Exploration Cycle

43 The Concept of PISA

The Concept of PISA

Algorithms Applications

SPEA2

knapsack

NSGA-II

TSP

network processor design

PAES

Platform and programming language independent Interface for Search Algorithms [Bleuler et al.: 2002]

44 PISA: Implementation

PISA: Implementation

shared file system

selector process

variator process

text files

application independent: mating / environmental selection individuals are described by IDs and objective vectors

handshake protocol: state / action individual IDs objective vectors parameters

application dependent: variation operators stores and manages individuals

45 PISA Website

PISA Website

http://www.tik.ee.ethz.ch/pisa

46 EXPO - Tool

EXPO - Tool

47 Results

Results

Performance for encryption/decryption

Performance for RT voice processing

48 Validation Strategy

Validation Strategy

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